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IC63LV1024
Document Title
128K x 8 Hight Speed SRAM with 3.3V Central Power
Revision History
Revision No
0A 0B 0C 0D
History
Initial Draft Add B (36-pin TF-BGA 6x8mm) and H (32-pin TSOP-1 8x13.4mm) package type To correct the TYPO error Obsolete "H" type
Draft Date
Remark
September 12,2001 June 20,2002 October 16,2003 April 16,2004
The attached datasheets are provided by ICSI. Integrated Circuit Solution Inc reserve the right to change the specifications and products. ICSI will answer to your questions about device. If you have any questions, please contact the ICSI offices.
Integrated Circuit Solution Inc.
AHSR025-0D 04/16/2004
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IC63LV1024
128K x 8 HIGH-SPEED CMOS STATIC RAM 3.3V REVOLUTIONARY PINOUT
FEATURES
* High-speed access times: 8, 10, 12 and 15 ns * High-performance, low-power CMOS process * Multiple center power and ground pins for greater noise immunity * Easy memory expansion with CE and OE options * CE power-down * Fully static operation: no clock or refresh required * TTL compatible inputs and outputs * Single 3.3V power supply * Packages available: - 32-pin 300mil SOJ - 32-pin 400mil SOJ - 32-pin 400mil TSOP-2 - 36-pin TF-BGA (6mmx8mm)
DESCRIPTION The ICSI IC63LV1024 is a very high-speed, low power, 131,
072-word by 8-bit CMOS static RAM in revolutionary pinout. The IC63LV1024 is fabricated using ICSI's high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields higher performance and low power consumption devices. When CE is HIGH (deselected), the device assumes a standby mode at which the power dissipation can be reduced down to 250 W (typical) with CMOS input levels. The IS63LV1024 operates from a single 3.3V power supply and all inputs are TTL-compatible. The IS63LV1024 is available in 32-pin 300mil SOJ, 400mil SOJ, 400mil TSOP-2 and 36-pin TF-BGA (6mmx8mm).
FUNCTIONAL BLOCK DIAGRAM
A0-A16
DECODER
128K X 8 MEMORY ARRAY
VCC GND I/O DATA CIRCUIT
I/O0-I/O7
COLUMN I/O
CE OE WE CONTROL CIRCUIT
ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors which may appear in this publication. (c) Copyright 2000, Integrated Circuit Solution Inc.
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Integrated Circuit Solution Inc.
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IC63LV1024
PIN CONFIGURATION
32-Pin SOJ
PIN CONFIGURATION
32-Pin TSOP-2
A0 A1 A2 A3 CE I/O0 I/O1 Vcc GND I/O2 I/O3 WE A4 A5 A6 A7 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 A16 A15 A14 A13 OE I/O7 I/O6 GND Vcc I/O5 I/O4 A12 A11 A10 A9 A8
A0 A1 A2 A3 CE I/O0 I/O1 Vcc GND I/O2 I/O3 WE A4 A5 A6 A7
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
A16 A15 A14 A13 OE I/O7 I/O6 GND Vcc I/O5 I/O4 A12 A11 A10 A9 A8
PIN CONFIGURATION
36-Pin TF-BGA (TOP View) (6mm x 8mm)
1 A B C D E F G H
A0 I/O4 I/O5 GND Vcc I/O6 I/O7 A9
2
A1 A2
3
NC WE NC
4
A3 A4 A5
5
A6 A7
6
A8 I/O0 I/O1 Vcc GND
NC OE A10 CE A11
NC A16 A12 A15 A13
I/O2 I/O3 A14
Integrated Circuit Solution Inc.
AHSR025-0D 04/16/2004
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IC63LV1024
PIN DESCRIPTIONS
A0-A16 CE OE WE I/O1-I/O8 Vcc GND Address Inputs Chip Enable Input Output Enable Input Write Enable Input Bidirectional Ports Power Ground
TRUTH TABLE
Mode WE X H H L CE H L L L OE X H L X I/O Operation Vcc Current High-Z High-Z DOUT DIN ISB1, ISB2 ICC1, ICC2 ICC1, ICC2 ICC1, ICC2 Not Selected (Power-down) Output Disabled Read Write
ABSOLUTE MAXIMUM RATINGS(1)
Symbol VTERM TBIAS TSTG PT Parameter Terminal Voltage with Respect to GND Temperature Under Bias Storage Temperature Power Dissipation Value -0.5 to Vcc + 0.5 -55 to +125 -65 to +150 1.0 Unit V C C W
Notes: 1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
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Integrated Circuit Solution Inc.
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IC63LV1024
OPERATING RANGE
Range Commercial Industrial Ambient Temperature 0C to +70C -40C to +85C VCC 3.3V 0.3V 3.3V 0.3V
DC ELECTRICAL CHARACTERISTICS (Over Operating Range)
Symbol Parameter VOH VOL VIH VIL ILI ILO Output HIGH Voltage Output LOW Voltage Input HIGH Voltage Input LOW Voltage(1) Input Leakage Output Leakage GND VIN VCC GND VOUT VCC, Outputs Disabled Com. Ind. Com. Ind. Test Conditions VCC = Min., IOH = -4.0 mA VCC = Min., IOL = 8.0 mA Min. 2.4 -- 2.2 -0.3 -2 -5 -2 -5 Max. -- 0.4 VCC + 0.3 0.8 2 5 2 5 Unit V V V V A A
Notes: 1. VIL = -3.0V for pulse width less than 10 ns. 2. The Vcc operating range for 8 ns is 3.3V +10%, -5%.
POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range)
Symbol Parameter ICC1 ISB1 Vcc Operating Supply Current TTL Standby Current (TTL Inputs) CMOS Standby Current (CMOS Inputs) Test Conditions VCC = Max., CE = VIL IOUT = 0 mA, f = Max. VCC = Max., VIN = VIH or VIL CE VIH, f = 0 VCC = Max., CE VCC - 0.2V, VIN VCC - 0.2V, or VIN 0.2V, f = 0 Com. Ind. Com. Ind. Com. Ind. Min. -- -- -- -- -- -- -8 ns Max. 160 170 30 40 10 15 -10 ns Min. Max. -- -- -- -- -- -- 150 160 30 40 10 15 -12 ns Min. Max. -- -- -- -- -- -- 140 150 30 40 10 15 -15 ns Min. Max. Unit -- -- -- -- -- -- 130 140 30 40 10 15 mA mA
ISB2
mA
Notes: 1. At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
CAPACITANCE(1,2)
Symbol CIN CI/O Parameter Input Capacitance Input/Output Capacitance Conditions VIN = 0V VOUT = 0V Max. 6 8 Unit pF pF
Notes: 1. Tested initially and after any design or process changes that may affect these parameters. 2. Test conditions: TA = 25C, f = 1 MHz, Vcc = 3.3V.
Integrated Circuit Solution Inc.
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IC63LV1024
READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range)
Symbol Parameter Read Cycle Time Address Access Time Output Hold Time CE Access Time OE Access Time OE to Low-Z Output OE to High-Z Output CE to Low-Z Output CE to High-Z Output -8 ns Min. Max. 8 -- 3 -- -- 0 0 3 0 -- 8 -- 8 4 -- 4 -- 4 -10 ns Min. Max. 10 -- 3 -- -- 0 0 3 0 -- 10 -- 10 5 -- 5 -- 5 -12 ns Min. Max. 12 -- 3 -- -- 0 0 3 0 -- 12 -- 12 6 -- 6 -- 6 -15 ns Min. Max. 15 -- 3 -- -- 0 0 3 0 -- 15 -- 15 7 -- 7 -- 7 Unit ns ns ns ns ns ns ns ns ns
tRC tAA tOHA tACE tDOE tLZOE(2) tHZOE(2) tLZCE
(2) (2)
tHZCE
Notes: 1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V and output loading specified in Figure 1a. 2. Tested with the load in Figure 1b. Transition is measured 500 mV from steady-state voltage. Not 100% tested.
AC TEST CONDITIONS
Parameter Input Pulse Level Input Rise and Fall Times Input and Output Timing and Reference Levels Output Load Unit 0V to 3.0V 3 ns 1.5V See Figures 1a and 1b
Notes: 1. The Vcc operating range for 8 ns is 3.3V +10%, -5%.
AC TEST LOADS
317 3.3V
ZOUT = 50 OUTPUT 50 VT = 1.5V
Figure 1a.
OUTPUT 5 pF Including jig and scope 351
Figure 1b.
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IC63LV1024
AC WAVEFORMS READ CYCLE NO. 1(1,2)
t RC
ADDRESS
t AA t OHA
DOUT
PREVIOUS DATA VALID
t OHA
DATA VALID
READ1.eps
READ CYCLE NO. 2(1,3)
t RC
ADDRESS
t AA
OE
t OHA
t DOE
CE
t HZOE
t LZOE t ACE t LZCE t HZCE
DATA VALID
CE_RD2.eps
DOUT
HIGH-Z
Notes: 1. WE is HIGH for a Read Cycle. 2. The device is continuously selected. OE, CE = VIL. 3. Address is valid prior to or coincident with CE LOW transitions.
Integrated Circuit Solution Inc.
AHSR025-0D 04/16/2004
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IC63LV1024
WRITE CYCLE SWITCHING CHARACTERISTICS(1,3) (Over Operating Range)
Symbol Parameter Write Cycle Time CE to Write End Address Setup Time to Write End Address Hold from Write End Address Setup Time WE Pulse Width Data Setup to Write End Data Hold from Write End -8 ns Min. Max. 8 7 7 0 0 7 4.5 0 0 0 -- -- -- -- -- -- -- -- 4 -- -10 ns Min. Max. 10 8 8 0 0 8 6 0 0 0 -- -- -- -- -- -- -- -- 5 -- -12 ns Min. Max. 12 9 9 0 0 9 6 0 0 0 -- -- -- -- -- -- -- -- 6 -- -15 ns Min. Max. 15 10 10 0 0 10 7 0 0 0 -- -- -- -- -- -- -- -- 7 -- Unit ns ns ns ns ns ns ns ns ns ns
tWC tSCE tAW tHA tSA tPWE(4) tSD tHD
tHZWE(2) WE LOW to High-Z Output tLZWE(2) WE HIGH to Low-Z Output
Notes: 1. Test conditions assume signal transition times of 3ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V and output loading specified in Figure 1a. 2. Tested with the load in Figure 1b. Transition is measured 500 mV from steady-state voltage. Not 100% tested. 3. The internal write time is defined by the overlap of CE LOW and WE LOW. All signals must be in valid states to initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of the signal that terminates the Write. 4. Tested with OE HIGH.
AC WAVEFORMS WRITE CYCLE NO. 1 (WE Controlled)(1,2)
t WC
ADDRESS
VALID ADDRESS
t SA
CE
t SCE
t HA
WE
t AW t PWE1 t PWE2 t HZWE t LZWE
HIGH-Z
DOUT
DATA UNDEFINED
t SD
DIN
t HD
DATAIN VALID
CE_WR1.eps
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Integrated Circuit Solution Inc.
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IC63LV1024
WRITE CYCLE NO. 2 (CE Controlled)(1,2)
t WC
ADDRESS
VALID ADDRESS
t HA
OE
CE
LOW
t AW t PWE1
WE
t SA
DOUT
DATA UNDEFINED
t HZWE
HIGH-Z
t LZWE
t SD
DIN
t HD
DATAIN VALID
CE_WR2.eps
WRITE CYCLE NO. 3 (WE Controlled: OE is LOW During Write Cycle)
t WC
ADDRESS
VALID ADDRESS
OE CE
LOW
t HA
LOW
t AW t PWE2
WE
t SA
DOUT
DATA UNDEFINED
t HZWE
HIGH-Z
t LZWE
t SD
DIN
t HD
DATAIN VALID
CE_WR3.eps
Notes: 1. The internal write time is defined by the overlap of CE LOW and WE LOW. All signals must be in valid states to initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of the signal that terminates the Write. 2. I/O will assume the High-Z state if OE VIH.
Integrated Circuit Solution Inc.
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IC63LV1024
ORDERING INFORMATION Commercial Range: 0C to +70C
Speed(ns) 8 8 8 8 10 10 10 10 12 12 12 12 15 15 15 15 Order Part No. IC63LV1024-8B IC63LV1024-8T IC63LV1024-8J IC63LV1024-8K IC63LV1024-10B IC63LV1024-10T IC63LV1024-10J IC63LV1024-10K IC63LV1024-12B IC63LV1024-12T IC63LV1024-12J IC63LV1024-12K IC63LV1024-15B IC63LV1024-15T IC63LV1024-15J IC63LV1024-15K Package 6*8mm TF-BGA 400mil T SOP-2 300mil SOJ 400mil SOJ 6*8mm TF-BGA 400mil T SOP-2 300mil SOJ 400mil SOJ 6*8mm TF-BGA 400mil T SOP-2 300mil SOJ 400mil SOJ 6*8mm TF-BGA 400mil T SOP-2 300mil SOJ 400mil SOJ
ORDERING INFORMATION Industrial Range: -40C to +85C
Speed(ns) 8 8 8 8 10 10 10 10 12 12 12 12 15 15 15 15 OrderPartNo. IC63LV1024-8BI IC63LV1024-8TI IC63LV1024-8JI IC63LV1024-8KI IC63LV1024-10BI IC63LV1024-10TI IC63LV1024-10JI IC63LV1024-10KI IC63LV1024-12BI IC63LV1024-12TI IC63LV1024-12JI IC63LV1024-12KI IC63LV1024-15BI IC63LV1024-15TI IC63LV1024-15JI IC63LV1024-15KI Package 6*8mm TF-BGA 400mil T SOP-2 300mil SOJ 400mil SOJ 6*8mm TF-BGA 400mil T SOP-2 300mil SOJ 400mil SOJ 6*8mm TF-BGA 400mil T SOP-2 300mil SOJ 400mil SOJ 6*8mm TF-BGA 400mil T SOP-2 300mil SOJ 400mil SOJ
Integrated Circuit Solution Inc.
HEADQUARTER: NO.2, TECHNOLOGY RD. V, SCIENCE-BASED INDUSTRIAL PARK, HSIN-CHU, TAIWAN, R.O.C. TEL: 886-3-5780333 Fax: 886-3-5783000 BRANCH OFFICE: 7F, NO. 106, SEC. 1, HSIN-TAI 5TH ROAD, HSICHIH TAIPEI COUNTY, TAIWAN, R.O.C. TEL: 886-2-26962140 FAX: 886-2-26962252 http://www.icsi.com.tw
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AHSR025-0D 04/16/2004

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